This internship in VLSI design covers, VLSI product development with CMOS circuits. Students will learn VLSI theory and techniques including design and analysis of CMOS inverters and combinational circuits. They will use 180nm technology, with RedHat Linux. They will also use EDA tools from Cadence Design Systems, an industry leader in this area. They will have exposure to tools like Virtuoso Schematic Editor, Spectre Circuit Simulator, Virtuoso layout Editor etc.
| Program features | |
| 1. | Introduction to VLSI Design flow |
| 2. | Combinational circuit design and analysis |
| 3. | Combinational Circuit simulation with various test cases and result analysis |
| 4. | PVT analysis |
| 5. | Physical design, DRC and LVS |
| 6. | Mini project |
| Outcomes: | |
| 1. | Revision of VLSI topics and techniques |
| 2. | Exposure to EDA tools from Cadence Design System |
| 3. | Hands-on experience in schematic design and Simulation |
| 4. | Hands-on experience in VLSI layout design |
| 5. | Feel of professional product development |
| 6. | Your first step towards a career in VLSI |
This internship by Mocite Technology Innovation Labs, strengthens the understanding of combinational and sequential digital design and builds expertise in development of Verilog models.
| Program features | |
| Verilog Topics | |
| 1. | Introduction to Verilog |
| 2. | Verilog Module Structure and Ports |
| 3. | Abstract levels of modelling |
| 4. | Data Types, System Tasks & Compiler directives |
| 5. | Gate Level Modelling |
| 6. | Data Flow Modelling |
| 7. | Behavioral Modelling |
| 8. | Blocking and non-blocking Statements |
| 9. | Functions & tasks |
| Digital design | |
| Projects | |
| 1. | Shift register- SISO, SIPO, PISO, PIPO |
| 2. | 32-bit carry shift adder |
| 3. | 32-bit carry skip adder |
| 4. | 32-bit ALU |
| 5. | MAC (Multiply and Accumulate) unit |
| 6. | 32-bit Booth multiplier |
| 7. | 32-bit Vedic multiplier |
| 6. | Synchronous FIFO |
